xSysCtl API

xSysCtl API Reference More...

Collaboration diagram for xSysCtl API:

Defines
#define	xSysCtlPeripheralClockSourceSet2(ePeripheral, eSrc, ulDivide)
	Set a peripheral clock source and peripheral divide.
Functions
void	xSysCtlPeripheralReset (unsigned long ulPeripheralID)
	Performs a software reset of a peripheral.
void	xSysCtlPeripheralEnable (unsigned long ulPeripheralID)
	Enables a peripheral.
void	xSysCtlPeripheralDisable (unsigned long ulPeripheralID)
	Disable a peripheral.
void	xSysCtlPeripheralEnable2 (unsigned long ulPeripheralBase)
	Enable a peripheral.
void	xSysCtlPeripheralDisable2 (unsigned long ulPeripheralBase)
	Disable a peripheral.
void	xSysCtlPeripheralReset2 (unsigned long ulPeripheralBase)
	Reset a peripheral.
unsigned long	xSysCtlPeripheraIntNumGet (unsigned long ulPeripheralBase)
	Get the peripheral interrupt number through peripheral base.
void	xSysCtlClockSet (unsigned long ulSysClk, unsigned long ulConfig)
	Set the clocking of the device.
unsigned long	xSysCtlClockGet (void)
	Get the processor clock rate.
void	xSysCtlDelay (unsigned long ulCount)
	Provide a small delay.
void	xSysCtlReset (void)
	Reset the device.
void	xSysCtlSleep (void)
	Put the processor into sleep mode.
void	xSysCtlPeripheralClockSourceSet (unsigned long ulPeripheralSrc, unsigned long ulDivide)
	Set a peripheral clock source and peripheral divide.

---

Detailed Description

xSysCtl API Reference

CoX Port Details

//! +--------------------------------+----------------+--------+
//! |xSysCtl API                     |       CoX      | NUC1xx |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheralReset          |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheralEnable         |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheralDisable        |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheralReset2         |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheralEnable2        |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheralDisable2       |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheraIntNumGet       |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlClockSet                 |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlClockGet                 |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlDelay                    |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlReset                    |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlSleep                    |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheralClockSourceSet |    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! |xSysCtlPeripheralClockSourceSet2|    Mandatory   |    Y   |
//! |--------------------------------|----------------|--------|
//! 

---

Define Documentation

#define xSysCtlPeripheralClockSourceSet2	(		ePeripheral,
			eSrc,
			ulDivide
	)

Set a peripheral clock source and peripheral divide.

Parameters:

ePeripheral	is the peripheral which's clock source will be set.
eSrc	is the clock source will be set.
ulDivide	is the peripheral clock divide to set.

Peripherals clock source are seted with this function. At power-up, all Peripherals clock source are Peripherals clock source; they must be set in order to operate or respond to register reads/writes.

The ulPeripheralSrc parameter must be only one of the following values: CoX Port Details.

//! +--------------------+------------------------+---------------------------+
//! |    manufacturer    |ePeripheral             |eSrc                       |
//! |--------------------|------------------------|---------------------------|
//! |    CoX Common &    |This parameter is a     |This parameter is a        |
//! |      Mandatory     |mandatory.Mandatory     |mandatory. So it           |
//! |                    |is the format of        |should be: INT             |
//! |                    |Variable naming.So it   |HCLK  HCLK_n EXTSL         |
//! |                    |should be: ADCn,        |INTSL  MAIN  PLL           |
//! |                    |TIMERn or UARTn         |PLL_n  EXTTRG              |
//! |                    |n indicate the pin      |n indicate the pin         |
//! |                    |number such as          |number such as             |
//! |                    |0 1 2 3 ....            |0 1 2 3 ....               |
//! |--------------------|------------------------|---------------------------|
//! |       NUC1xx       |    ADC0                |MAIN PLL INT               |
//! |                    |    PWMB                |INT HCLK EXTSL MAIN        |
//! |                    |    PWMA                |INT HCLK EXTSL MAIN        |
//! |                    |    FRQDIV              |INT HCLK EXTSL MAIN        |
//! |                    |    I2S0                |INT HCLK PLL MAIN          |
//! |                    |    TIMER0              |INT EXTTRG HCLK EXTSL MAIN |
//! |                    |    TIMER1              |INT EXTTRG HCLK EXTSL MAIN |
//! |                    |    TIMER2              |INT EXTTRG HCLK EXTSL MAIN |
//! |                    |    TIMER3              |INT EXTTRG HCLK EXTSL MAIN |
//! |                    |    UART0               |INT PLL MAIN               |
//! |                    |    UART1               |INT PLL MAIN               |
//! |                    |    UART2               |INT PLL MAIN               |
//! |                    |    CAN0                |INT PLL MAIN               |
//! |                    |    WDT0                |INTSL HCLK_2048 EXTSL      |
//! |--------------------|------------------------|---------------------------|
//! 

Returns:

None.

Definition at line 1187 of file xsysctl.h.

---

Function Documentation

void xSysCtlPeripheralReset

(

unsigned long

ulPeripheralID

)

Performs a software reset of a peripheral.

Parameters:

ulPeripheralID

is the peripheral to reset. Details please refer to xSysCtl Peripheral ID.

This function performs a software reset of the specified peripheral. An individual peripheral reset signal is asserted for a brief period and then deasserted, returning the internal state of the peripheral to its reset condition.

The ulPeripheralID parameter must be only one of the following values: Details please refer to 2.CoX Port Details.

Returns:

None.

void xSysCtlPeripheralEnable

(

unsigned long

ulPeripheralID

)

Enables a peripheral.

Parameters:

ulPeripheralID

is the peripheral to enable. Details please refer to xSysCtl Peripheral ID.

Peripherals are enabled with this function. At power-up, all peripherals are disabled; they must be enabled in order to operate or respond to register reads/writes.

The ulPeripheralID parameter must be only one of the following values: Details please refer to 2.CoX Port Details.

Note:

It takes five clock cycles after the write to enable a peripheral before the the peripheral is actually enabled. During this time, attempts to access the peripheral will result in a bus fault. Care should be taken to ensure that the peripheral is not accessed during this brief time period.

Returns:

None.

void xSysCtlPeripheralDisable

(

unsigned long

ulPeripheralID

)

Disable a peripheral.

Parameters:

ulPeripheralID

is the peripheral to disable. Details please Refer to xSysCtl Peripheral ID.

Peripherals are disabled with this function. Once disabled, they will not operate or respond to register reads/writes.

The ulPeripheralID parameter must be only one of the following values: Details please Refer to 2.CoX Port Details.

Returns:

None.

void xSysCtlPeripheralEnable2

(

unsigned long

ulPeripheralBase

)

Enable a peripheral.

Parameters:

ulPeripheralBase

a Peripheral base indicate which peripheral to be enabled.Details please Refer to xLowLayer Peripheral Memmap.

Peripherals are enabled with this function. At power-up, all peripherals are disabled; they must be enabled in order to operate or respond to register reads/writes.

The ulPeripheral parameter must be only one of the following values: Details please Refer to xLowLayer Peripheral Memmap.

Note:

None.

Returns:

None.

void xSysCtlPeripheralDisable2

(

unsigned long

ulPeripheralBase

)

Disable a peripheral.

Parameters:

ulPeripheralBase

a Peripheral base indicate which peripheral to be enabled.Details please Refer to xLowLayer Peripheral Memmap.

Peripherals are disabled with this function. At power-up, all peripherals are disabled; they must be enabled in order to operate or respond to register reads/writes.

The ulPeripheral parameter must be only one of the following values: Details please Refer to xLowLayer Peripheral Memmap.

Note:

None.

Returns:

None.

void xSysCtlPeripheralReset2

(

unsigned long

ulPeripheralBase

)

Reset a peripheral.

Parameters:

ulPeripheralBase

a Peripheral base indicate which peripheral to be Reset.Details please Refer to xLowLayer Peripheral Memmap.

Peripherals are Reset with this function. At power-up, all peripherals are disabled; they must be enabled in order to operate or respond to register reads/writes.

The ulPeripheral parameter must be only one of the following values: Details please Refer to xLowLayer Peripheral Memmap.

Note:

None.

Returns:

None.

unsigned long xSysCtlPeripheraIntNumGet

(

unsigned long

ulPeripheralBase

)

Get the peripheral interrupt number through peripheral base.

Parameters:

ulPeripheral

The peripheral's base

Note:

It's especially useful to enable the short pin's corresponding peripheral interrupt: Use the short pin to Get the GPIO base through xGPIOSPinToPort function, and then use this function to enable the GPIO interrupt.

Returns:

None.

void xSysCtlClockSet	(	unsigned long	ulSysClk,
		unsigned long	ulConfig
	)

Set the clocking of the device.

Parameters:

ulConfig

is the required configuration of the device clocking.

This function configures the clocking of the device. The input crystal frequency, oscillator to be used, use of the PLL, and the system clock divider are all configured with this function.

The ulConfig parameter is the logical OR of several different values, many of which are grouped into sets where only one can be chosen.

The external crystal frequency is chosen with one of the following values: xSYSCTL_XTAL_4MHZ, xSYSCTL_XTAL_5MHZ, xSYSCTL_XTAL_6MHZ, xSYSCTL_XTAL_24MHZ.

The oscillator source is chosen with one of the following values: xSYSCTL_OSC_MAIN, xSYSCTL_OSC_INT, xSYSCTL_OSC_INTSL, xSYSCTL_OSC_EXTSL.

The internal and main oscillators and PLL are disabled with the xSYSCTL_INT_OSC_DIS and xSYSCTL_MAIN_OSC_DIS flags, xSYSCTL_PLL_PWRDN respectively. The external oscillator must be enabled in order to use an external clock source. Note that attempts to disable the oscillator used to clock the device will be prevented by the hardware.
Details please Refer to XSysCtl_Clock_Set_Config_CoX.

Returns:

None.

unsigned long xSysCtlClockGet

(

void

)

Get the processor clock rate.

This function determines the clock rate of the processor clock. This is also the clock rate of all the peripheral modules (with the exception of PWM, which has its own clock divider).

Note:

This will not return accurate results if SysCtlClockSet() has not been called to configure the clocking of the device, or if the device is directly clocked from a crystal (or a clock source) that is not one of the supported crystal frequencies. In the later case, this function should be modified to directly return the correct system clock rate.

Returns:

The processor clock rate.

void xSysCtlDelay

(

unsigned long

ulCount

)

Provide a small delay.

Parameters:

ulCount

is the number of delay loop iterations to perform.

This function provides a means of generating a constant length delay. It is written in assembly to keep the delay consistent across tool chains, avoiding the need to tune the delay based on the tool chain in use.

The loop takes 3 cycles/loop.

Returns:

None.

void xSysCtlReset

(

void

)

Reset the device.

This function will perform a software reset of the entire device. The processor and all peripherals will be reset and all device registers will return to their default values (with the exception of the reset cause register, which will maintain its current value but have the software reset bit set as well).

Returns:

This function does not return.

void xSysCtlSleep

(

void

)

Put the processor into sleep mode.

This function places the processor into sleep mode; it will not return until the processor returns to run mode. The peripherals that are enabled via SysCtlPeripheralSleepEnable() continue to operate and can wake up the processor (if automatic clock gating is enabled with SysCtlPeripheralClockGating(), otherwise all peripherals continue to operate).

Returns:

None.

void xSysCtlPeripheralClockSourceSet	(	unsigned long	ulPeripheralSrc,
		unsigned long	ulDivide
	)

Set a peripheral clock source and peripheral divide.

Parameters:

ulPeripheralSrc	is the peripheral clock source to set.
ulDivide	is the peripheral clock divide to set.

Peripherals clock source are seted with this function. At power-up, all Peripherals clock source are Peripherals clock source; they must be set in order to operate or respond to register reads/writes.

The ulPeripheralSrc parameter must be only one of the following values: SysCtl Peripheral Source Clock.

Returns:

None.