xI2C API Reference. More...

Collaboration diagram for xI2C API:

Defines
#define	xI2CMasterInit(ulBase, ulI2CClk)
	Initialize the I2C controller.
#define	xI2CMasterEnable(ulBase)
	Enables the I2C Master block.
#define	xI2CMasterDisable(ulBase)
	Disables the I2C master block.
#define	xI2CMasterIntFlagGet(ulBase)
#define	xI2CMasterIntEnable(ulBase, ulIntType)
	Enable I2C interrupt of the specified I2C port.
#define	xI2CMasterIntDisable(ulBase, ulIntType)
	Disable I2C interrupt of the specified I2C port.
#define	xI2CSlaveIntEnable(ulBase, ulIntType)
	Enable I2C interrupt of the specified I2C port.
#define	xI2CSlaveIntDisable(ulBase, ulIntType)
	Disable I2C interrupt of the specified I2C port.
#define	xI2CSlaveInit(ulBase, ucSlaveAddr, ulGeneralCall)
	Set the clock rate of the specified I2C port.
#define	xI2CSlaveEnable(ulBase)
	Enables the I2C Slave block.
#define	xI2CSlaveDisable(ulBase)
	Disables the I2C Slave block.
#define	xI2CSlaveDataPut(ulBase, ucData)
#define	xI2CSlaveDataGet(ulBase)
#define	xI2CSlaveIntFlagGet(ulBase)
#define	xI2CIntCallbackInit(ulBase, xtI2CCallback)
	Init interrupts callback for the specified I2C Port.
Functions
xtBoolean	xI2CMasterBusBusy (unsigned long ulBase)
	Indicates whether or not the I2C bus is busy.
xtBoolean	xI2CMasterBusy (unsigned long ulBase)
	Indicates whether or not the I2C Master is busy.
unsigned long	xI2CMasterError (unsigned long ulBase)
void	xI2CMasterDataPut (unsigned long ulBase, unsigned char ucData)
unsigned long	xI2CMasterDataGet (unsigned long ulBase)
void	xI2CMasterStop (unsigned long ulBase)
	Transmite the STOP condition, master goes to idle state.
void	xI2CMasterWriteRequestS1 (unsigned long ulBase, unsigned char ucSlaveAddr, unsigned char ucData, xtBoolean bEndTransmition)
	Send a master transmit request when the bus is idle.(Write Step1)
void	xI2CMasterWriteRequestS2 (unsigned long ulBase, unsigned char ucData, xtBoolean bEndTransmition)
	Send a master data transmit request when the master have obtained control of the bus.(Write Step2)
unsigned long	xI2CMasterWriteS1 (unsigned long ulBase, unsigned char ucSlaveAddr, unsigned char ucData, xtBoolean bEndTransmition)
	Write a data to the slave when the bus is idle, and waiting for all bus transmiton complete.(Write Step1)
unsigned long	xI2CMasterWriteS2 (unsigned long ulBase, unsigned char ucData, xtBoolean bEndTransmition)
	Write a data to the slave, when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Step2)
unsigned long	xI2CMasterWriteBufS1 (unsigned long ulBase, unsigned char ucSlaveAddr, const unsigned char *pucDataBuf, unsigned long ulLen, xtBoolean bEndTransmition)
	Write a data buffer to the slave when the bus is idle, and waiting for all bus transmiton complete.(Write Buffer Step1)
unsigned long	xI2CMasterWriteBufS2 (unsigned long ulBase, const unsigned char *pucDataBuf, unsigned long ulLen, xtBoolean bEndTransmition)
	Write a data buffer to the slave, when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Buffer Step2)
void	xI2CMasterReadRequestS1 (unsigned long ulBase, unsigned char ucSlaveAddr, xtBoolean bEndTransmition)
	Send a master receive request when the bus is idle.(Read Step1)
void	xI2CMasterReadRequestS2 (unsigned long ulBase, xtBoolean bEndTransmition)
	Send a master data receive request when the master have obtained control of the bus.(Write Step2)
void	xI2CMasterReadLastRequestS2 (unsigned long ulBase)
	Send a master data receive request with an NACK when the master have obtained control of the bus(Write Step2).
unsigned long	xI2CMasterReadS1 (unsigned long ulBase, unsigned char ucSlaveAddr, unsigned char *pucData, xtBoolean bEndTransmition)
	Read a data from a slave when the bus is idle, and waiting for all bus transmiton complete.(Read Step1)
unsigned long	xI2CMasterReadS2 (unsigned long ulBase, unsigned char *pucData, xtBoolean bEndTransmition)
	Read a data from a slave when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Read Step2)
unsigned long	xI2CMasterReadBufS1 (unsigned long ulBase, unsigned char ucSlaveAddr, unsigned char *pucDataBuf, unsigned long ulLen, xtBoolean bEndTransmition)
	Read some data from a slave when the bus is idle, and waiting for all bus transmiton complete.(Read Buffer Step1)
unsigned long	xI2CMasterReadBufS2 (unsigned long ulBase, unsigned char *pucDataBuf, unsigned long ulLen, xtBoolean bEndTransmition)
	Read some data from a slave when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Buffer Step2)

Detailed Description

xI2C API Reference.

CoX Port Details

//! +--------------------------+----------------+------------------------+
//! |xI2C API                  |       CoX      |         M051           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterInit            |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterEnable          |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterDisable         |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterBusBusy         |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterBusy            |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterError           |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterDataPut         |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterDataGet         |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterStop            |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterWriteRequestS1  |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterWriteRequestS2  |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterWriteS1         |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterWriteS2         |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterWriteBufS1      |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterWriteBufS2      |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterReadRequestS1   |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterReadRequestS2   |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterReadLastRequestS2|    Mandatory  |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterReadS1          |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterReadS2          |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterReadBufS1       |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterReadBufS2       |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterIntEnable       |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CMasterIntDisable      |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CSlaveIntEnable        |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CSlaveIntDisable       |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CSlaveIntInit          |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CSlaveEnable           |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CSlaveDisable          |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CIntCallbackInit       |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CSlaveDataPut          |    Mandatory   |            Y           |
//! |--------------------------|----------------|------------------------|
//! |xI2CSlaveDataGet          |    Mandatory   |            Y           |
//! +--------------------------+----------------+------------------------+
//!

Define Documentation

#define xI2CMasterInit	(	ulBase,
		ulI2CClk
	)

Initialize the I2C controller.

Parameters:

ulBase	is the I2C module base address.
ulI2CClk	is the I2C clock bit rate.

This function initializes operation of the I2C Master block. Upon successful initialization of the I2C block, this function will have set the bus speed for the master, and will have enabled the I2C Master block.

The parameter ulBase can be:

xI2C0_BASE
xI2C1_BASE

The parameter ulI2CClk can only be:

100000 - I2C works under standard-mode (Sm), with a bit rate up to 100 kbit/s
400000 - I2C works under fast-mode (Fm), with a bit rate up to 400 kbit/s

Returns:: None.

Definition at line 399 of file xi2c.h.

#define xI2CMasterEnable ( ulBase )

Enables the I2C Master block.

Parameters:

ulBase is the base address of the I2C module.

This will enable operation of the I2C Master block.

Returns:: None.

Definition at line 413 of file xi2c.h.

#define xI2CMasterDisable ( ulBase )

Disables the I2C master block.

Parameters:

ulBase is the base address of the I2C module.

This will disable operation of the I2C master block.

Returns:: None.

Definition at line 427 of file xi2c.h.

#define xI2CMasterIntFlagGet ( ulBase )

Gets the current I2C Master status.

Parameters:

ulBase is the base address of the I2C module.

This function reads the bytes of data from the I2C Master status Register.

Returns:: Returns the bytes(unsigned long) of I2C Master status Register.

Definition at line 517 of file xi2c.h.

#define xI2CMasterIntEnable	(	ulBase,
		ulIntType
	)

Enable I2C interrupt of the specified I2C port.

Parameters:

ulBase	specifies the I2C module base address.
ulIntType	specifies the I2C interrupt type. Details please refer to xI2C_INT_Type.

This function is to enable I2C interrupt of the specified I2C port.

The ulBase must be: xI2C0_BASE.

Returns:: None.

Definition at line 1020 of file xi2c.h.

#define xI2CMasterIntDisable	(	ulBase,
		ulIntType
	)

Disable I2C interrupt of the specified I2C port.

Parameters:

ulBase	specifies the I2C module base address.
ulIntType	specifies the I2C interupt type. Details please refer to xI2C_INT_Type.

This function is to disable I2C interrupt of the specified I2C port.

The ulBase must be: I2C0_BASE.

Returns:: None.

Definition at line 1039 of file xi2c.h.

#define xI2CSlaveIntEnable	(	ulBase,
		ulIntType
	)

Enable I2C interrupt of the specified I2C port.

Parameters:

ulBase	specifies the I2C module base address.
ulIntType	specifies the I2C interupt type. Details please refer to xI2C_INT_Type.

This function is to enable I2C interrupt of the specified I2C port.

The ulBase can be one of the following values: xI2C0_BASE, xI2C1_BASE.

Note:: None

Returns:: None.

Definition at line 1060 of file xi2c.h.

#define xI2CSlaveIntDisable	(	ulBase,
		ulIntType
	)

Disable I2C interrupt of the specified I2C port.

Parameters:

ulBase	specifies the I2C module base address.
ulIntType	specifies the I2C interupt type. Details please refer to xI2C_INT_Type.

This function is to disable I2C interrupt of the specified I2C port.

The ulBase can be one of the following values: I2C0_BASE, I2C1_BASE.

Note:: None

Returns:: None.

Definition at line 1081 of file xi2c.h.

#define xI2CSlaveInit	(	ulBase,
		ucSlaveAddr,
		ulGeneralCall
	)

Set the clock rate of the specified I2C port.

Parameters:

ulBase	specifies the I2C module base address.
ucSlaveAddr	specifies the slave address.
ulGeneralCall	specifies enable General Call function or not. Details please refer to xI2C General Call.

This function is to Set 4 7-bit slave addresses and enable General Call function of specified I2C port.

The ulBase must be:I2C0_BASE.

The ucSlaveAddr is the I2C slave address,There are 4 slave address. The ucSlaveAddr can be a 7-bit value.

The ulGeneralCall is to enable the General Call function or not. The ulGeneralCall can be one of the following values: I2C_GENERAL_CALL_EN,I2C_GENERAL_CALL_DIS. Details please refer to xI2C_General_Call_CoX.

Note:: this is only for slave

Returns:: None.

Definition at line 1111 of file xi2c.h.

#define xI2CSlaveEnable ( ulBase )

Enables the I2C Slave block.

Parameters:

ulBase is the base address of the I2C module.

This will enable operation of the I2C Slave block.

Returns:: None.

Definition at line 1125 of file xi2c.h.

#define xI2CSlaveDisable ( ulBase )

Disables the I2C Slave block.

Parameters:

ulBase is the base address of the I2C module.

This will disable operation of the I2C Slave block.

Returns:: None.

Definition at line 1139 of file xi2c.h.

#define xI2CSlaveDataPut	(	ulBase,
		ucData
	)

Transmits a byte from the I2C Slave.

Parameters:

ulBase	is the base address of the I2C module.
ucData	data to be transmitted from the I2C Slave

This function will place the supplied data into I2C Slave Data Register.

Returns:: None.

Definition at line 1154 of file xi2c.h.

#define xI2CSlaveDataGet ( ulBase )

Receives a byte that has been sent to the I2C Slave.

Parameters:

ulBase is the base address of the I2C Slave module.

This function reads a byte of data from the I2C Slave Data Register.

Returns:: Returns the byte received from by the I2C Slave, cast as an unsigned long.

Definition at line 1169 of file xi2c.h.

#define xI2CSlaveIntFlagGet ( ulBase )

Gets the current I2C Slave status.

Parameters:

ulBase is the base address of the I2C module.

This function reads the bytes of data from the I2C Slave status Register.

Returns:: Returns the bytes(unsigned long) of I2C Slave status Register.

Definition at line 1183 of file xi2c.h.

#define xI2CIntCallbackInit	(	ulBase,
		xtI2CCallback
	)

Init interrupts callback for the specified I2C Port.

Parameters:

ulPort	is the base address of the UART port.
xtUARTCallback	is callback for the specified I2C Port.

Init interrupts callback for the specified I2C Port.

Returns:: None.

Definition at line 1198 of file xi2c.h.

Function Documentation

xtBoolean xI2CMasterBusBusy ( unsigned long ulBase )

Indicates whether or not the I2C bus is busy.

Parameters:

ulBase is the base address of the I2C module.

This function returns an indication of whether or not the I2C bus is busy. This function can be used in a multi-master environment to determine if another master is currently using the bus.

Returns:: Returns xtrue if the I2C bus is busy; otherwise, returns xfalse.

xtBoolean xI2CMasterBusy ( unsigned long ulBase )

Indicates whether or not the I2C Master is busy.

Parameters:

ulBase is the base address of the I2C Master module.

This function returns an indication of whether or not the I2C Master is busy transmitting or receiving data.

Returns:: Returns xtrue if the I2C Master is busy; otherwise, returns xfalse.

unsigned long xI2CMasterError ( unsigned long ulBase )

Gets the error status of the I2C Master module.

Parameters:

ulBase is the base address of the I2C Master module.

This function is used to obtain the error status of the Master module send and receive operations.

Returns:: Returns the error status, as one of I2C_MASTER_ERR_NONE, I2C_MASTER_ERR_ADDR_ACK, I2C_MASTER_ERR_DATA_ACK, or I2C_MASTER_ERR_ARB_LOST.

Gets the error status of the I2C Master module.

Parameters:

ulBase is the base address of the I2C Master module.

This function is used to obtain the error status of the Master module send and receive operations.

Returns:: Returns the error status, as one of xI2C_MASTER_ERR_NONE, xI2C_MASTER_ERR_ADDR_ACK, xI2C_MASTER_ERR_DATA_ACK, or xI2C_MASTER_ERR_ARB_LOST.

Definition at line 3041 of file xi2c.c.

References I2C0_BASE, I2C_I2STAT_M_RX_DAT_NACK, I2C_I2STAT_M_RX_SLAR_NACK, I2C_I2STAT_M_TX_ARB_LOST, I2C_I2STAT_M_TX_DAT_NACK, I2C_I2STAT_M_TX_SLAW_NACK, I2C_O_STATUS, I2C_STATUS_M, xASSERT, xHWREG, xI2C_MASTER_ERR_ADDR_ACK, xI2C_MASTER_ERR_ARB_LOST, xI2C_MASTER_ERR_DATA_ACK, and xI2C_MASTER_ERR_NONE.

Referenced by xI2CMasterReadS1(), xI2CMasterReadS2(), xI2CMasterWriteS1(), and xI2CMasterWriteS2().

void xI2CMasterDataPut	(	unsigned long	ulBase,
		unsigned char	ucData
	)

Transmits a byte from the I2C Master.

Parameters:

ulBase	is the base address of the I2C module.
ucData	data to be transmitted from the I2C Master

This function will place the supplied data into I2C Master Data Register.

Returns:: None.

Definition at line 1707 of file xi2c.c.

References I2C_CON_AA, I2C_CON_SI, I2C_O_CON, I2C_O_DAT, and xHWREG.

unsigned long xI2CMasterDataGet ( unsigned long ulBase )

Receives a byte that has been sent to the I2C Master.

Parameters:

ulBase is the base address of the I2C Master module.

This function reads a byte of data from the I2C Master Data Register.

Returns:: Returns the byte received from by the I2C Master, cast as an unsigned long.

Definition at line 1733 of file xi2c.c.

References I2C_CON_SI, I2C_O_CON, I2C_O_DAT, and xHWREG.

void xI2CMasterStop ( unsigned long ulBase )

Transmite the STOP condition, master goes to idle state.

Parameters:

ulBase is the base address of the I2C Master module.

This function free the I2C bus. When the master no longer need send or receive any more data, or need to terminate this transmition after getting some errors, call this function.

Returns:: None.

void xI2CMasterWriteRequestS1	(	unsigned long	ulBase,
		unsigned char	ucSlaveAddr,
		unsigned char	ucData,
		xtBoolean	bEndTransmition
	)

Send a master transmit request when the bus is idle.(Write Step1)

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
ucData	is the byte to transmit.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new write transmition. When the master have not obtained control of the bus, This function send request to transmit the START condition, the slave address and the data, Then it returns immediately, no waiting any bus transmition to complete.

Users can call xI2CMasterBusy() to check if all the bus transmition complete, the call xI2CMasterError() to check if any error occurs.

After the master obtained control of the bus, and haven't release it, users can call xI2CMasterWriteRequestS2() to continue transmit data to slave. Users can also call xI2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
ucData	is the byte to transmit.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new write transmition. When the master have not obtained control of the bus, This function send request to transmit the START condition, the slave address and the data, Then it returns immediately, no waiting any bus transmition to complete.

Users can call I2CMasterBusy() to check if all the bus transmition complete, the call I2CMasterErr() to check if any error occurs.

After the master obtained control of the bus, and haven't release it, users can call I2CMasterWriteRequestS2() to continue transmit data to slave. Users can also call I2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Definition at line 2035 of file xi2c.c.

References I2C0_BASE, I2C_CON_SI, I2C_I2STAT_M_TX_SLAW_ACK, I2C_I2STAT_M_TX_START, I2C_O_CON, I2C_O_DAT, xASSERT, and xHWREG.

Referenced by xI2CMasterWriteS1().

void xI2CMasterWriteRequestS2	(	unsigned long	ulBase,
		unsigned char	ucData,
		xtBoolean	bEndTransmition
	)

Send a master data transmit request when the master have obtained control of the bus.(Write Step2)

Parameters:

ulBase	is the base address of the I2C Master module.
ucData	is the byte to transmit.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called xI2CMasterWriteRequestS1() without any error), and haven't release it, users can call this function to continue transmit data to slave.

This function just send request to transmit the data, and it returns immediately, no waiting any bus transmition to complete.

Users can call xI2CMasterBusy() to check if all the bus transmition complete, the call xI2CMasterError() to check if any error occurs. Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Parameters:

ulBase	is the base address of the I2C Master module.
ucData	is the byte to transmit.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called I2CMasterWriteRequestS1() without any error), and haven't release it, users can call this function to continue transmit data to slave.

This function just send request to transmit the data, and it returns immediately, no waiting any bus transmition to complete.

Users can call I2CMasterBusy() to check if all the bus transmition complete, the call I2CMasterErr() to check if any error occurs. Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Definition at line 2113 of file xi2c.c.

References I2C0_BASE, I2C_CON_AA, I2C_CON_EI, I2C_O_CON, I2C_O_DAT, xASSERT, and xHWREG.

Referenced by xI2CMasterWriteS2().

unsigned long xI2CMasterWriteS1	(	unsigned long	ulBase,
		unsigned char	ucSlaveAddr,
		unsigned char	ucData,
		xtBoolean	bEndTransmition
	)

Write a data to the slave when the bus is idle, and waiting for all bus transmiton complete.(Write Step1)

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
ucData	is the byte to transmit.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new write transmition. When the master have not obtained control of the bus, This function transmit the START condition, the slave address and the data, then waiting for all bus transmition complete.

Users can then check the return value to see if any error occurs:

xI2C_MASTER_ERR_NONE - 0, no error
xI2C_MASTER_ERR_ADDR_ACK - The transmitted address was not acknowledged
xI2C_MASTER_ERR_DATA_ACK - The transmitted data was not acknowledged
xI2C_MASTER_ERR_ARB_LOST - The I2C controller lost arbitration.

After the master obtained control of the bus, and haven't release it, users can call xI2CMasterWriteS2() to continue transmit data to slave. Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

This function is always used in thread mode.

Returns:: Returns the master error status.

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
ucData	is the byte to transmit.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new write transmition. When the master have not obtained control of the bus, This function transmit the START condition, the slave address and the data, then waiting for all bus transmition complete.

Users can then check the return value to see if any error occurs:

I2C_MASTER_ERR_NONE - 0, no error
I2C_MASTER_ERR_ADDR_ACK - The transmitted address was not acknowledged
I2C_MASTER_ERR_DATA_ACK - The transmitted data was not acknowledged
I2C_MASTER_ERR_ARB_LOST - The I2C controller lost arbitration.

After the master obtained control of the bus, and haven't release it, users can call I2CMasterWriteS2() to continue transmit data to slave. Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

This function is always used in thread mode.

Returns:: Returns the master error status.

Definition at line 2172 of file xi2c.c.

References I2C0_BASE, I2C_I2STAT_M_TX_DAT_ACK, I2C_O_CON, I2C_O_STATUS, I2C_STATUS_M, xASSERT, xfalse, xHWREG, xI2C_MASTER_ERR_NONE, xI2CMasterError(), and xI2CMasterWriteRequestS1().

Referenced by xI2CMasterWriteBufS1().

Here is the call graph for this function:

unsigned long xI2CMasterWriteS2	(	unsigned long	ulBase,
		unsigned char	ucData,
		xtBoolean	bEndTransmition
	)

Write a data to the slave, when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Step2)

Parameters:

ulBase	is the base address of the I2C Master module.
ucData	is the byte to transmit.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called xI2CMasterWriteS1() without any error), and haven't release it, users can call this function to continue transmit data to slave.

This function transmit the data to the slave, and waiting for all bus transmition complete.

Users can then check the return value to see if any error occurs:

xI2C_MASTER_ERR_NONE - 0, no error
xI2C_MASTER_ERR_ADDR_ACK - The transmitted address was not acknowledged
xI2C_MASTER_ERR_DATA_ACK - The transmitted data was not acknowledged
xI2C_MASTER_ERR_ARB_LOST - The I2C controller lost arbitration.

Then users can call this function to continue transmit data to slave. Users call also call xI2CMasterStop() to terminate this transmition and release the I2C bus.

This function is always used in thread mode.

Returns:: Returns the master error status.

Parameters:

ulBase	is the base address of the I2C Master module.
ucData	is the byte to transmit.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called I2CMasterWriteS1() without any error), and haven't release it, users can call this function to continue transmit data to slave.

This function transmit the data to the slave, and waiting for all bus transmition complete.

Users can then check the return value to see if any error occurs:

I2C_MASTER_ERR_NONE - 0, no error
I2C_MASTER_ERR_ADDR_ACK - The transmitted address was not acknowledged
I2C_MASTER_ERR_DATA_ACK - The transmitted data was not acknowledged
I2C_MASTER_ERR_ARB_LOST - The I2C controller lost arbitration.

Then users can call this function to continue transmit data to slave. Users call also call I2CMasterStop() to terminate this transmition and release the I2C bus.

This function is always used in thread mode.

Returns:: Returns the master error status.

Definition at line 2245 of file xi2c.c.

References I2C0_BASE, I2C_I2STAT_M_TX_DAT_ACK, I2C_O_CON, I2C_O_STATUS, I2C_STATUS_M, xASSERT, xfalse, xHWREG, xI2C_MASTER_ERR_NONE, xI2CMasterError(), and xI2CMasterWriteRequestS2().

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unsigned long xI2CMasterWriteBufS1	(	unsigned long	ulBase,
		unsigned char	ucSlaveAddr,
		const unsigned char *	pucDataBuf,
		unsigned long	ulLen,
		xtBoolean	bEndTransmition
	)

Write a data buffer to the slave when the bus is idle, and waiting for all bus transmiton complete.(Write Buffer Step1)

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
pucDataBuf	is the data buffer to transmit.
ulLen	is the data buffer byte size.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new data buffer write transmition. When the master have not obtained control of the bus, This function transmit the START condition, the slave address and the data, then waiting for the data transmition complete, and continue next data transmition, until all complete. If there is any error occurs, the remain data will be canceled.

Users can then check the return value to see how many datas have been successfully transmited. if the number != ulLen, user can call xI2CMasterError() to see what error occurs.

After the master obtained control of the bus, and haven't release it, users can call xI2CMasterWriteS2() / xI2CMasterWriteBufS2() to continue transmit data to slave. Users call also call xI2CMasterStop() to terminate this transmition and release the I2C bus.

This function is always used in thread mode.

Returns:: Returns the data number that have been successully tranmited.

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
pucDataBuf	is the data buffer to transmit.
ulLen	is the data buffer byte size.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new data buffer write transmition. When the master have not obtained control of the bus, This function transmit the START condition, the slave address and the data, then waiting for the data transmition complete, and continue next data transmition, until all complete. If there is any error occurs, the remain data will be canceled.

Users can then check the return value to see how many datas have been successfully transmited. if the number != ulLen, user can call I2CMasterErr() to see what error occurs.

After the master obtained control of the bus, and haven't release it, users can call I2CMasterWriteS2() / I2CMasterWriteBufS2() to continue transmit data to slave. Users call also call I2CMasterStop() to terminate this transmition and release the I2C bus.

This function is always used in thread mode.

Returns:: Returns the data number that have been successully tranmited.

Definition at line 2317 of file xi2c.c.

References I2C0_BASE, I2C_I2STAT_M_TX_DAT_ACK, I2C_I2STAT_M_TX_SLAW_ACK, I2C_I2STAT_M_TX_START, xASSERT, xI2C_MASTER_ERR_NONE, xI2CMasterWriteBufS2(), and xI2CMasterWriteS1().

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unsigned long xI2CMasterWriteBufS2	(	unsigned long	ulBase,
		const unsigned char *	pucDataBuf,
		unsigned long	ulLen,
		xtBoolean	bEndTransmition
	)

Write a data buffer to the slave, when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Buffer Step2)

Parameters:

ulBase	is the base address of the I2C Master module.
pucDataBuf	is the data buffer to transmit.
ulLen	is the data buffer byte size.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called xI2CMasterWriteS1() or xI2CMasterWriteBufS1() without any error), and haven't release it, users can call this function to continue transmit data to slave.

This function transmit the data one by one to the slave, waiting for every data transmition complete, and continue next data transmition, until all complete. If there is any error occurs, the remain data will be canceled.

Users can then check the return value to see how many datas have been successfully transmited. if the number != ulLen, user can call xI2CMasterError() to see what error occurs.

Then users can call xI2CMasterWriteS2() or this function to continue transmit data to slave. Users call also call xI2CMasterStop() to terminate this transmition and release the I2C bus.

This function is always used in thread mode.

Returns:: Returns the data number that have been successully tranmited.

Parameters:

ulBase	is the base address of the I2C Master module.
pucDataBuf	is the data buffer to transmit.
ulLen	is the data buffer byte size.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called I2CMasterWriteS1() or I2CMasterWriteBufS1() without any error), and haven't release it, users can call this function to continue transmit data to slave.

This function transmit the data one by one to the slave, waiting for every data transmition complete, and continue next data transmition, until all complete. If there is any error occurs, the remain data will be canceled.

Users can then check the return value to see how many datas have been successfully transmited. if the number != ulLen, user can call I2CMasterErr() to see what error occurs.

Then users can call I2CMasterWriteS2() or this function to continue transmit data to slave. Users call also call I2CMasterStop() to terminate this transmition and release the I2C bus.

This function is always used in thread mode.

Returns:: Returns the data number that have been successully tranmited.

Definition at line 2419 of file xi2c.c.

References I2C0_BASE, I2C_I2STAT_M_TX_DAT_ACK, and xASSERT.

Referenced by xI2CMasterWriteBufS1().

void xI2CMasterReadRequestS1	(	unsigned long	ulBase,
		unsigned char	ucSlaveAddr,
		xtBoolean	bEndTransmition
	)

Send a master receive request when the bus is idle.(Read Step1)

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new receive transmition. When the master have not obtained control of the bus, This function send request to transmit the START condition, the slave address and the data request, Then it returns immediately, no waiting any bus transmition to complete.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can call xI2CMasterBusy() to check if all the bus transmition complete, then call xI2CMasterError() to check if any error occurs. Then user can get the data by calling xI2CMasterDataGet() if there is no error occurs.

After the master obtained control of the bus, and haven't release it, users can call xI2CMasterReadRequestS2() to continue receive data from slave. Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new receive transmition. When the master have not obtained control of the bus, This function send request to transmit the START condition, the slave address and the data request, Then it returns immediately, no waiting any bus transmition to complete.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can call I2CMasterBusy() to check if all the bus transmition complete, then call I2CMasterErr() to check if any error occurs. Then user can get the data by calling I2CMasterDataGet() if there is no error occurs.

After the master obtained control of the bus, and haven't release it, users can call I2CMasterReadRequestS2() to continue receive data from slave. Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Definition at line 2500 of file xi2c.c.

References I2C0_BASE, I2C_CON_AA, I2C_I2STAT_M_RX_SLAR_ACK, I2C_I2STAT_M_TX_RESTART, I2C_I2STAT_M_TX_START, I2C_O_CON, xASSERT, and xHWREG.

Referenced by xI2CMasterReadS1().

void xI2CMasterReadRequestS2	(	unsigned long	ulBase,
		xtBoolean	bEndTransmition
	)

Send a master data receive request when the master have obtained control of the bus.(Write Step2)

Parameters:

ulBase	is the base address of the I2C Master module.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called xI2CMasterReadRequestS1() without any error), and haven't release it, users can call this function to continue receive data from slave.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can call xI2CMasterBusy() to check if all the bus transmition complete, then call xI2CMasterError() to check if any error occurs. Then user can get the data by calling xI2CMasterDataGet() if there is no error occurs.

Then users can call this function to continue receive data from slave. Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Parameters:

ulBase	is the base address of the I2C Master module.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called I2CMasterReadRequestS1() without any error), and haven't release it, users can call this function to continue receive data from slave.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can call I2CMasterBusy() to check if all the bus transmition complete, then call I2CMasterErr() to check if any error occurs. Then user can get the data by calling I2CMasterDataGet() if there is no error occurs.

Then users can call this function to continue receive data from slave. Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Definition at line 2567 of file xi2c.c.

References I2C0_BASE, I2C_CON_AA, I2C_O_CON, xASSERT, and xHWREG.

Referenced by xI2CMasterReadS2().

void xI2CMasterReadLastRequestS2 ( unsigned long ulBase )

Send a master data receive request with an NACK when the master have obtained control of the bus(Write Step2).

Parameters:

ulBase is the base address of the I2C Master module.

This function is used to request the last data to receive, and signal the end of the transfer to the slave transmitter. Then the master can repeat START condition, switch to transmit or other slaves without lost control of the bus.

Users can call xI2CMasterBusy() to check if all the bus transmition complete, then call xI2CMasterError() to check if any error occurs. Then user can get the data by calling xI2CMasterDataGet() if there is no error occurs.

Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Parameters:

ulBase is the base address of the I2C Master module.

This function is used to request the last data to receive, and signal the end of the transfer to the slave transmitter. Then the master can repeat START condition, switch to transmit or other slaves without lost control of the bus.

Users can call I2CMasterBusy() to check if all the bus transmition complete, then call I2CMasterErr() to check if any error occurs. Then user can get the data by calling I2CMasterDataGet() if there is no error occurs.

Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

For this function returns immediately, it is always using in the interrupt hander.

Returns:: None.

Definition at line 2610 of file xi2c.c.

References I2C0_BASE, I2C_CON_AA, I2C_O_CON, xASSERT, and xHWREG.

unsigned long xI2CMasterReadS1	(	unsigned long	ulBase,
		unsigned char	ucSlaveAddr,
		unsigned char *	pucData,
		xtBoolean	bEndTransmition
	)

Read a data from a slave when the bus is idle, and waiting for all bus transmiton complete.(Read Step1)

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
pucData	is the buffer where to save the data.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new receive transmition. When the master have not obtained control of the bus, This function send request to transmit the START condition, the slave address and the data request, then waiting for all bus transmition complete.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can then check the return value to see if any error occurs:

xI2C_MASTER_ERR_NONE - 0, no error
xI2C_MASTER_ERR_ADDR_ACK - The transmitted address was not acknowledged
xI2C_MASTER_ERR_DATA_ACK - The transmitted data was not acknowledged
xI2C_MASTER_ERR_ARB_LOST - The I2C controller lost arbitration.

After the master obtained control of the bus, and haven't release it, users can call xI2CMasterReadS2() to continue receive data from slave. Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

This function is usually used in thread mode.

Returns:: Returns the master error status.

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
pucData	is the buffer where to save the data.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new receive transmition. When the master have not obtained control of the bus, This function send request to transmit the START condition, the slave address and the data request, then waiting for all bus transmition complete.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can then check the return value to see if any error occurs:

I2C_MASTER_ERR_NONE - 0, no error
I2C_MASTER_ERR_ADDR_ACK - The transmitted address was not acknowledged
I2C_MASTER_ERR_DATA_ACK - The transmitted data was not acknowledged
I2C_MASTER_ERR_ARB_LOST - The I2C controller lost arbitration.

After the master obtained control of the bus, and haven't release it, users can call I2CMasterReadS2() to continue receive data from slave. Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

This function is usually used in thread mode.

Returns:: Returns the master error status.

Definition at line 2660 of file xi2c.c.

References I2C0_BASE, I2C_CON_AA, I2C_CON_SI, I2C_I2STAT_M_RX_DAT_ACK, I2C_O_CON, I2C_O_DAT, I2C_O_STATUS, I2C_STATUS_M, SysCtlDelay(), xASSERT, xfalse, xHWREG, xI2C_MASTER_ERR_NONE, xI2CMasterError(), and xI2CMasterReadRequestS1().

Referenced by xI2CMasterReadBufS1().

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unsigned long xI2CMasterReadS2	(	unsigned long	ulBase,
		unsigned char *	pucData,
		xtBoolean	bEndTransmition
	)

Read a data from a slave when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Read Step2)

Parameters:

ulBase	is the base address of the I2C Master module.
pucData	is the buffer where to save the data.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called xI2CMasterReadS1() without any error), and haven't release it, users can call this function to continue receive data from the slave.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

It will be waiting for all bus transmition complete before return. Users can then check the return value to see if any error occurs:

xI2C_MASTER_ERR_NONE - 0, no error
xI2C_MASTER_ERR_ADDR_ACK - The transmitted address was not acknowledged
xI2C_MASTER_ERR_DATA_ACK - The transmitted data was not acknowledged
xI2C_MASTER_ERR_ARB_LOST - The I2C controller lost arbitration.

Then useres can call this function to continue receive data from slave. Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

This function is usually used in thread mode.

Returns:: Returns the master error status.

Parameters:

ulBase	is the base address of the I2C Master module.
pucData	is the buffer where to save the data.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called I2CMasterReadS1() without any error), and haven't release it, users can call this function to continue receive data from the slave.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

It will be waiting for all bus transmition complete before return. Users can then check the return value to see if any error occurs:

I2C_MASTER_ERR_NONE - 0, no error
I2C_MASTER_ERR_ADDR_ACK - The transmitted address was not acknowledged
I2C_MASTER_ERR_DATA_ACK - The transmitted data was not acknowledged
I2C_MASTER_ERR_ARB_LOST - The I2C controller lost arbitration.

Then useres can call this function to continue receive data from slave. Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

This function is usually used in thread mode.

Returns:: Returns the master error status.

Definition at line 2737 of file xi2c.c.

References I2C0_BASE, I2C_CON_AA, I2C_CON_SI, I2C_I2STAT_M_RX_DAT_ACK, I2C_O_CON, I2C_O_DAT, I2C_O_STATUS, I2C_STATUS_M, xASSERT, xfalse, xHWREG, xI2C_MASTER_ERR_NONE, xI2CMasterError(), and xI2CMasterReadRequestS2().

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unsigned long xI2CMasterReadBufS1	(	unsigned long	ulBase,
		unsigned char	ucSlaveAddr,
		unsigned char *	pucDataBuf,
		unsigned long	ulLen,
		xtBoolean	bEndTransmition
	)

Read some data from a slave when the bus is idle, and waiting for all bus transmiton complete.(Read Buffer Step1)

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
pucDataBuf	is the buffer where to save the data.
ulLen	is the data number to receive.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new data buffer receive transmition. When the master have not obtained control of the bus, This function send request to transmit the START condition, the slave address and the data request, then waiting for the data transmition complete, and continue next data transmition, until all complete. If there is any error occurs, the remain data will be canceled.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can then check the return value to see how many datas have been successfully received. if the number != ulLen, user can call xI2CMasterError() to see what error occurs.

After the master obtained control of the bus, and haven't release it, users can call xI2CMasterReadS2() or xI2CMasterReadBufS2() to continue receive data . from slave .Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

This function is usually used in thread mode.

Returns:: Returns the data number that have been successully received.

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
pucDataBuf	is the buffer where to save the data.
ulLen	is the data number to receive.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

This function init a new data buffer receive transmition. When the master have not obtained control of the bus, This function send request to transmit the START condition, the slave address and the data request, then waiting for the data transmition complete, and continue next data transmition, until all complete. If there is any error occurs, the remain data will be canceled.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can then check the return value to see how many datas have been successfully received. if the number != ulLen, user can call I2CMasterErr() to see what error occurs.

After the master obtained control of the bus, and haven't release it, users can call I2CMasterReadS2() or I2CMasterReadBufS2() to continue receive data . from slave .Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

This function is usually used in thread mode.

Returns:: Returns the data number that have been successully received.

Definition at line 2825 of file xi2c.c.

References I2C0_BASE, I2C_CON_AA, I2C_CON_EI, I2C_CON_SI, I2C_I2STAT_M_RX_SLAR_ACK, I2C_I2STAT_M_TX_RESTART, I2C_I2STAT_M_TX_START, I2C_O_CON, I2C_O_DAT, I2C_O_STATUS, I2C_STATUS_M, SysCtlDelay(), xASSERT, xHWREG, xI2C_MASTER_ERR_NONE, xI2CMasterReadBufS2(), and xI2CMasterReadS1().

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unsigned long xI2CMasterReadBufS2	(	unsigned long	ulBase,
		unsigned char *	pucDataBuf,
		unsigned long	ulLen,
		xtBoolean	bEndTransmition
	)

Read some data from a slave when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Buffer Step2)

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
pucDataBuf	is the buffer where to save the data.
ulLen	is the data number to receive.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called xI2CMasterReadS1() or xI2CMasterReadBufS1() without any error), and haven't release it, users can call this function to continue receive data from slave.

This function receive data one by one from the slave, waiting for every data transmition complete, and continue next data transmition, until all complete. If there is any error occurs, the remain data will be canceled.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can then check the return value to see how many datas have been successfully received. if the number != ulLen, user can call xI2CMasterError() to see what error occurs.

After the master obtained control of the bus, and haven't release it, users can call xI2CMasterReadS2() or xI2CMasterReadBufS2() to continue receive data from slave. Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus.

This function is usually used in thread mode.

Returns:: Returns the data number that have been successully received.

Parameters:

ulBase	is the base address of the I2C Master module.
ucSlaveAddr	is the 7-bit slave address.
pucDataBuf	is the buffer where to save the data.
ulLen	is the data number to receive.
bEndTransmition	is flag to control if transmit the STOP condition and terminate this transmition.

After the master obtained control of the bus(have called I2CMasterReadS1() or I2CMasterReadBufS1() without any error), and haven't release it, users can call this function to continue receive data from slave.

This function receive data one by one from the slave, waiting for every data transmition complete, and continue next data transmition, until all complete. If there is any error occurs, the remain data will be canceled.

If bEndTransmition is xtrue, the receive operation will followed by an negative ACK and STOP condition.

Users can then check the return value to see how many datas have been successfully received. if the number != ulLen, user can call I2CMasterErr() to see what error occurs.

After the master obtained control of the bus, and haven't release it, users can call I2CMasterReadS2() or I2CMasterReadBufS2() to continue receive data from slave. Users call also can I2CMasterStop() to terminate this transmition and release the I2C bus.

This function is usually used in thread mode.

Returns:: Returns the data number that have been successully received.

Definition at line 2976 of file xi2c.c.

References I2C0_BASE, I2C_CON_AA, I2C_CON_SI, I2C_I2STAT_M_RX_DAT_ACK, I2C_O_CON, I2C_O_DAT, xASSERT, and xHWREG.

Referenced by xI2CMasterReadBufS1().

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