NUC122 SPI Register

Here are the detailed info of SPI registers. More...

Collaboration diagram for NUC122 SPI Register:

Modules
	SPI Register Offsets(Map)
	Here is the SPI register offset, users can get the register address through SPI_BASE + offset.
	SPI Control Register(SPI_CNTRL)
	Defines for the bit fields in the SPI_CNTRL register.
	SPI DIVIDER Register(SPI_DIVIDER)
	Defines for the bit fields in the SPI_DIVIDER register.
	SPI SSR Register(SPI_SSR)
	Defines for the bit fields in the SPI_SSR register.
	SPI RX0 Register(SPI_RX0)
	Defines for the bit fields in the SPI_RX0 register.
	SPI RX1 Register(SPI_RX1)
	Defines for the bit fields in the SPI_RX1 register.
	SPI TX0 Register(SPI_TX0)
	Defines for the bit fields in the SPI_TX0 register.
	SPI TX1 Register(SPI_TX1)
	Defines for the bit fields in the SPI_TX1 register.
	SPI VARCLK Register(SPI_VARCLK)
	Defines for the bit fields in the SPI_VARCLK register.

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Detailed Description

Here are the detailed info of SPI registers.

it contains:

• Register offset.
• Detailed bit-field of the registers.
• Enum and mask of the registers.

Users can read or write the registers through xHWREG().